#include <avr/cpp/IO.h>Go to the source code of this file.
Namespaces | |
| namespace | AVRCpp |
Classes | |
| struct | AVRCpp::_UDR1 |
| struct | AVRCpp::_UBRR1H |
| struct | AVRCpp::_UBRR1L |
| struct | AVRCpp::_UCSR1C |
| struct | AVRCpp::_UCSR1B |
| struct | AVRCpp::_UCSR1A |
| struct | AVRCpp::_UDR0 |
| struct | AVRCpp::_UBRR0H |
| struct | AVRCpp::_UBRR0L |
| struct | AVRCpp::_UCSR0C |
| struct | AVRCpp::_UCSR0B |
| struct | AVRCpp::_UCSR0A |
| struct | AVRCpp::_TWAMR |
| struct | AVRCpp::_TWCR |
| struct | AVRCpp::_TWDR |
| struct | AVRCpp::_TWAR |
| struct | AVRCpp::_TWSR |
| struct | AVRCpp::_TWBR |
| struct | AVRCpp::_ASSR |
| struct | AVRCpp::_OCR2B |
| struct | AVRCpp::_OCR2A |
| struct | AVRCpp::_TCNT2 |
| struct | AVRCpp::_TCCR2B |
| struct | AVRCpp::_TCCR2A |
| struct | AVRCpp::_OCR1BH |
| struct | AVRCpp::_OCR1BL |
| struct | AVRCpp::_OCR1AH |
| struct | AVRCpp::_OCR1AL |
| struct | AVRCpp::_ICR1H |
| struct | AVRCpp::_ICR1L |
| struct | AVRCpp::_TCNT1H |
| struct | AVRCpp::_TCNT1L |
| struct | AVRCpp::_TCCR1C |
| struct | AVRCpp::_TCCR1B |
| struct | AVRCpp::_TCCR1A |
| struct | AVRCpp::_DIDR1 |
| struct | AVRCpp::_DIDR0 |
| struct | AVRCpp::_ADMUX |
| struct | AVRCpp::_ADCSRB |
| struct | AVRCpp::_ADCSRA |
| struct | AVRCpp::_ADCH |
| struct | AVRCpp::_ADCL |
| struct | AVRCpp::_PCMSK3 |
| struct | AVRCpp::_TIMSK2 |
| struct | AVRCpp::_TIMSK1 |
| struct | AVRCpp::_TIMSK0 |
| struct | AVRCpp::_PCMSK2 |
| struct | AVRCpp::_PCMSK1 |
| struct | AVRCpp::_PCMSK0 |
| struct | AVRCpp::_EICRA |
| struct | AVRCpp::_PCICR |
| struct | AVRCpp::_OSCCAL |
| struct | AVRCpp::_PRR |
| struct | AVRCpp::_CLKPR |
| struct | AVRCpp::_WDTCSR |
| struct | AVRCpp::_SREG |
| struct | AVRCpp::_SPH |
| struct | AVRCpp::_SPL |
| struct | AVRCpp::_SPMCSR |
| struct | AVRCpp::_MCUCR |
| struct | AVRCpp::_MCUSR |
| struct | AVRCpp::_SMCR |
| struct | AVRCpp::_OCDR |
| struct | AVRCpp::_ACSR |
| struct | AVRCpp::_SPDR |
| struct | AVRCpp::_SPSR |
| struct | AVRCpp::_SPCR |
| struct | AVRCpp::_GPIOR2 |
| struct | AVRCpp::_GPIOR1 |
| struct | AVRCpp::_OCR0B |
| struct | AVRCpp::_OCR0A |
| struct | AVRCpp::_TCNT0 |
| struct | AVRCpp::_TCCR0B |
| struct | AVRCpp::_TCCR0A |
| struct | AVRCpp::_GTCCR |
| struct | AVRCpp::_EEARH |
| struct | AVRCpp::_EEARL |
| struct | AVRCpp::_EEDR |
| struct | AVRCpp::_EECR |
| struct | AVRCpp::_GPIOR0 |
| struct | AVRCpp::_EIMSK |
| struct | AVRCpp::_EIFR |
| struct | AVRCpp::_PCIFR |
| struct | AVRCpp::_TIFR2 |
| struct | AVRCpp::_TIFR1 |
| struct | AVRCpp::_TIFR0 |
| struct | AVRCpp::_PORTD |
| struct | AVRCpp::_DDRD |
| struct | AVRCpp::_PIND |
| struct | AVRCpp::_PORTC |
| struct | AVRCpp::_DDRC |
| struct | AVRCpp::_PINC |
| struct | AVRCpp::_PORTB |
| struct | AVRCpp::_DDRB |
| struct | AVRCpp::_PINB |
| struct | AVRCpp::_PORTA |
| struct | AVRCpp::_DDRA |
| struct | AVRCpp::_PINA |
| struct | AVRCpp::_OCR1B |
| struct | AVRCpp::_OCR1A |
| struct | AVRCpp::_ICR1 |
| struct | AVRCpp::_TCNT1 |
| struct | AVRCpp::_ADC |
| struct | AVRCpp::_SP |
Defines | |
| #define | _UMSEL11 0x80 |
| #define | _UMSEL10 0x40 |
| #define | _UPM11 0x20 |
| #define | _UPM10 0x10 |
| #define | _USBS1 0x8 |
| #define | _UCSZ11 0x4 |
| #define | _UCSZ10 0x2 |
| #define | _UCPOL1 0x1 |
| #define | _RXCIE1 0x80 |
| #define | _TXCIE1 0x40 |
| #define | _UDRIE1 0x20 |
| #define | _RXEN1 0x10 |
| #define | _TXEN1 0x8 |
| #define | _UCSZ12 0x4 |
| #define | _RXB81 0x2 |
| #define | _TXB81 0x1 |
| #define | _RXC1 0x80 |
| #define | _TXC1 0x40 |
| #define | _UDRE1 0x20 |
| #define | _FE1 0x10 |
| #define | _DOR1 0x8 |
| #define | _UPE1 0x4 |
| #define | _U2X1 0x2 |
| #define | _MPCM1 0x1 |
| #define | _UMSEL01 0x80 |
| #define | _UMSEL00 0x40 |
| #define | _UPM01 0x20 |
| #define | _UPM00 0x10 |
| #define | _USBS0 0x8 |
| #define | _UCSZ01 0x4 |
| #define | _UCSZ00 0x2 |
| #define | _UCPOL0 0x1 |
| #define | _RXCIE0 0x80 |
| #define | _TXCIE0 0x40 |
| #define | _UDRIE0 0x20 |
| #define | _RXEN0 0x10 |
| #define | _TXEN0 0x8 |
| #define | _UCSZ02 0x4 |
| #define | _RXB80 0x2 |
| #define | _TXB80 0x1 |
| #define | _RXC0 0x80 |
| #define | _TXC0 0x40 |
| #define | _UDRE0 0x20 |
| #define | _FE0 0x10 |
| #define | _DOR0 0x8 |
| #define | _UPE0 0x4 |
| #define | _U2X0 0x2 |
| #define | _MPCM0 0x1 |
| #define | _TWAM6 0x80 |
| #define | _TWAM5 0x40 |
| #define | _TWAM4 0x20 |
| #define | _TWAM3 0x10 |
| #define | _TWAM2 0x8 |
| #define | _TWAM1 0x4 |
| #define | _TWAM0 0x2 |
| #define | _TWINT 0x80 |
| #define | _TWEA 0x40 |
| #define | _TWSTA 0x20 |
| #define | _TWSTO 0x10 |
| #define | _TWWC 0x8 |
| #define | _TWEN 0x4 |
| #define | _TWIE 0x1 |
| #define | _TWA6 0x80 |
| #define | _TWA5 0x40 |
| #define | _TWA4 0x20 |
| #define | _TWA3 0x10 |
| #define | _TWA2 0x8 |
| #define | _TWA1 0x4 |
| #define | _TWA0 0x2 |
| #define | _TWGCE 0x1 |
| #define | _TWS7 0x80 |
| #define | _TWS6 0x40 |
| #define | _TWS5 0x20 |
| #define | _TWS4 0x10 |
| #define | _TWS3 0x8 |
| #define | _TWPS1 0x2 |
| #define | _TWPS0 0x1 |
| #define | _EXCLK 0x40 |
| #define | _AS2 0x20 |
| #define | _TCN2UB 0x10 |
| #define | _OCR2AUB 0x8 |
| #define | _OCR2BUB 0x4 |
| #define | _TCR2AUB 0x2 |
| #define | _TCR2BUB 0x1 |
| #define | _FOC2A 0x80 |
| #define | _FOC2B 0x40 |
| #define | _WGM22 0x8 |
| #define | _CS22 0x4 |
| #define | _CS21 0x2 |
| #define | _CS20 0x1 |
| #define | _COM2A1 0x80 |
| #define | _COM2A0 0x40 |
| #define | _COM2B1 0x20 |
| #define | _COM2B0 0x10 |
| #define | _WGM21 0x2 |
| #define | _WGM20 0x1 |
| #define | _FOC1A 0x80 |
| #define | _FOC1B 0x40 |
| #define | _ICNC1 0x80 |
| #define | _ICES1 0x40 |
| #define | _WGM13 0x10 |
| #define | _WGM12 0x8 |
| #define | _CS12 0x4 |
| #define | _CS11 0x2 |
| #define | _CS10 0x1 |
| #define | _COM1A1 0x80 |
| #define | _COM1A0 0x40 |
| #define | _COM1B1 0x20 |
| #define | _COM1B0 0x10 |
| #define | _WGM11 0x2 |
| #define | _WGM10 0x1 |
| #define | _AIN1D 0x2 |
| #define | _AIN0D 0x1 |
| #define | _ADC7D 0x80 |
| #define | _ADC6D 0x40 |
| #define | _ADC5D 0x20 |
| #define | _ADC4D 0x10 |
| #define | _ADC3D 0x8 |
| #define | _ADC2D 0x4 |
| #define | _ADC1D 0x2 |
| #define | _ADC0D 0x1 |
| #define | _REFS1 0x80 |
| #define | _REFS0 0x40 |
| #define | _ADLAR 0x20 |
| #define | _MUX4 0x10 |
| #define | _MUX3 0x8 |
| #define | _MUX2 0x4 |
| #define | _MUX1 0x2 |
| #define | _MUX0 0x1 |
| #define | _ACME 0x40 |
| #define | _ADTS2 0x4 |
| #define | _ADTS1 0x2 |
| #define | _ADTS0 0x1 |
| #define | _ADEN 0x80 |
| #define | _ADSC 0x40 |
| #define | _ADATE 0x20 |
| #define | _ADIF 0x10 |
| #define | _ADIE 0x8 |
| #define | _ADPS2 0x4 |
| #define | _ADPS1 0x2 |
| #define | _ADPS0 0x1 |
| #define | _PCINT31 0x80 |
| #define | _PCINT30 0x40 |
| #define | _PCINT29 0x20 |
| #define | _PCINT28 0x10 |
| #define | _PCINT27 0x8 |
| #define | _PCINT26 0x4 |
| #define | _PCINT25 0x2 |
| #define | _PCINT24 0x1 |
| #define | _OCIE2B 0x4 |
| #define | _OCIE2A 0x2 |
| #define | _TOIE2 0x1 |
| #define | _ICIE1 0x20 |
| #define | _OCIE1B 0x4 |
| #define | _OCIE1A 0x2 |
| #define | _TOIE1 0x1 |
| #define | _OCIE0B 0x4 |
| #define | _OCIE0A 0x2 |
| #define | _TOIE0 0x1 |
| #define | _PCINT23 0x80 |
| #define | _PCINT22 0x40 |
| #define | _PCINT21 0x20 |
| #define | _PCINT20 0x10 |
| #define | _PCINT19 0x8 |
| #define | _PCINT18 0x4 |
| #define | _PCINT17 0x2 |
| #define | _PCINT16 0x1 |
| #define | _PCINT15 0x80 |
| #define | _PCINT14 0x40 |
| #define | _PCINT13 0x20 |
| #define | _PCINT12 0x10 |
| #define | _PCINT11 0x8 |
| #define | _PCINT10 0x4 |
| #define | _PCINT9 0x2 |
| #define | _PCINT8 0x1 |
| #define | _PCINT7 0x80 |
| #define | _PCINT6 0x40 |
| #define | _PCINT5 0x20 |
| #define | _PCINT4 0x10 |
| #define | _PCINT3 0x8 |
| #define | _PCINT2 0x4 |
| #define | _PCINT1 0x2 |
| #define | _PCINT0 0x1 |
| #define | _ISC21 0x20 |
| #define | _ISC20 0x10 |
| #define | _ISC11 0x8 |
| #define | _ISC10 0x4 |
| #define | _ISC01 0x2 |
| #define | _ISC00 0x1 |
| #define | _PCIE3 0x8 |
| #define | _PCIE2 0x4 |
| #define | _PCIE1 0x2 |
| #define | _PCIE0 0x1 |
| #define | _PRTWI 0x80 |
| #define | _PRTIM2 0x40 |
| #define | _PRTIM0 0x20 |
| #define | _PRUSART1 0x10 |
| #define | _PRTIM1 0x8 |
| #define | _PRSPI 0x4 |
| #define | _PRUSART0 0x2 |
| #define | _PRADC 0x1 |
| #define | _CLKPCE 0x80 |
| #define | _CLKPS3 0x8 |
| #define | _CLKPS2 0x4 |
| #define | _CLKPS1 0x2 |
| #define | _CLKPS0 0x1 |
| #define | _WDIF 0x80 |
| #define | _WDIE 0x40 |
| #define | _WDP3 0x20 |
| #define | _WDCE 0x10 |
| #define | _WDE 0x8 |
| #define | _WDP2 0x4 |
| #define | _WDP1 0x2 |
| #define | _WDP0 0x1 |
| #define | _SREG_I 0x80 |
| #define | _SREG_T 0x40 |
| #define | _SREG_H 0x20 |
| #define | _SREG_S 0x10 |
| #define | _SREG_V 0x8 |
| #define | _SREG_N 0x4 |
| #define | _SREG_Z 0x2 |
| #define | _SREG_C 0x1 |
| #define | _SP15 0x80 |
| #define | _SP14 0x40 |
| #define | _SP13 0x20 |
| #define | _SP12 0x10 |
| #define | _SP11 0x8 |
| #define | _SP10 0x4 |
| #define | _SP9 0x2 |
| #define | _SP8 0x1 |
| #define | _SP7 0x80 |
| #define | _SP6 0x40 |
| #define | _SP5 0x20 |
| #define | _SP4 0x10 |
| #define | _SP3 0x8 |
| #define | _SP2 0x4 |
| #define | _SP1 0x2 |
| #define | _SP0 0x1 |
| #define | _SPMIE 0x80 |
| #define | _RWWSB 0x40 |
| #define | _SIGRD 0x20 |
| #define | _RWWSRE 0x10 |
| #define | _BLBSET 0x8 |
| #define | _PGWRT 0x4 |
| #define | _PGERS 0x2 |
| #define | _SPMEN 0x1 |
| #define | _JTD 0x80 |
| #define | _BODS 0x40 |
| #define | _BODSE 0x20 |
| #define | _PUD 0x10 |
| #define | _IVSEL 0x2 |
| #define | _IVCE 0x1 |
| #define | _JTRF 0x10 |
| #define | _WDRF 0x8 |
| #define | _BORF 0x4 |
| #define | _EXTRF 0x2 |
| #define | _PORF 0x1 |
| #define | _SM2 0x8 |
| #define | _SM1 0x4 |
| #define | _SM0 0x2 |
| #define | _SE 0x1 |
| #define | _ACD 0x80 |
| #define | _ACBG 0x40 |
| #define | _ACO 0x20 |
| #define | _ACI 0x10 |
| #define | _ACIE 0x8 |
| #define | _ACIC 0x4 |
| #define | _ACIS1 0x2 |
| #define | _ACIS0 0x1 |
| #define | _SPIF0 0x80 |
| #define | _WCOL0 0x40 |
| #define | _SPI2X0 0x1 |
| #define | _SPIE0 0x80 |
| #define | _SPE0 0x40 |
| #define | _DORD0 0x20 |
| #define | _MSTR0 0x10 |
| #define | _CPOL0 0x8 |
| #define | _CPHA0 0x4 |
| #define | _SPR01 0x2 |
| #define | _SPR00 0x1 |
| #define | _FOC0A 0x80 |
| #define | _FOC0B 0x40 |
| #define | _WGM02 0x8 |
| #define | _CS02 0x4 |
| #define | _CS01 0x2 |
| #define | _CS00 0x1 |
| #define | _COM0A1 0x80 |
| #define | _COM0A0 0x40 |
| #define | _COM0B1 0x20 |
| #define | _COM0B0 0x10 |
| #define | _WGM01 0x2 |
| #define | _WGM00 0x1 |
| #define | _TSM 0x80 |
| #define | _PSR2 0x2 |
| #define | _PSR54310 0x1 |
| #define | _EEPM1 0x20 |
| #define | _EEPM0 0x10 |
| #define | _EERIE 0x8 |
| #define | _EEMPE 0x4 |
| #define | _EEPE 0x2 |
| #define | _EERE 0x1 |
| #define | _INT2 0x4 |
| #define | _INT1 0x2 |
| #define | _INT0 0x1 |
| #define | _INTF2 0x4 |
| #define | _INTF1 0x2 |
| #define | _INTF0 0x1 |
| #define | _PCIF3 0x8 |
| #define | _PCIF2 0x4 |
| #define | _PCIF1 0x2 |
| #define | _PCIF0 0x1 |
| #define | _ICF1 0x20 |
| #define | _OCF1B 0x4 |
| #define | _OCF1A 0x2 |
| #define | _TOV1 0x1 |
| #define | _OCF0B 0x4 |
| #define | _OCF0A 0x2 |
| #define | _TOV0 0x1 |
| #define | _PD7 0x80 |
| #define | _PD6 0x40 |
| #define | _PD5 0x20 |
| #define | _PD4 0x10 |
| #define | _PD3 0x8 |
| #define | _PD2 0x4 |
| #define | _PD1 0x2 |
| #define | _PD0 0x1 |
| #define | _DDD7 0x80 |
| #define | _DDD6 0x40 |
| #define | _DDD5 0x20 |
| #define | _DDD4 0x10 |
| #define | _DDD3 0x8 |
| #define | _DDD2 0x4 |
| #define | _DDD1 0x2 |
| #define | _DDD0 0x1 |
| #define | _PIND7 0x80 |
| #define | _PIND6 0x40 |
| #define | _PIND5 0x20 |
| #define | _PIND4 0x10 |
| #define | _PIND3 0x8 |
| #define | _PIND2 0x4 |
| #define | _PIND1 0x2 |
| #define | _PIND0 0x1 |
| #define | _PC7 0x80 |
| #define | _PC6 0x40 |
| #define | _PC5 0x20 |
| #define | _PC4 0x10 |
| #define | _PC3 0x8 |
| #define | _PC2 0x4 |
| #define | _PC1 0x2 |
| #define | _PC0 0x1 |
| #define | _DDC7 0x80 |
| #define | _DDC6 0x40 |
| #define | _DDC5 0x20 |
| #define | _DDC4 0x10 |
| #define | _DDC3 0x8 |
| #define | _DDC2 0x4 |
| #define | _DDC1 0x2 |
| #define | _DDC0 0x1 |
| #define | _PINC7 0x80 |
| #define | _PINC6 0x40 |
| #define | _PINC5 0x20 |
| #define | _PINC4 0x10 |
| #define | _PINC3 0x8 |
| #define | _PINC2 0x4 |
| #define | _PINC1 0x2 |
| #define | _PINC0 0x1 |
| #define | _PB7 0x80 |
| #define | _PB6 0x40 |
| #define | _PB5 0x20 |
| #define | _PB4 0x10 |
| #define | _PB3 0x8 |
| #define | _PB2 0x4 |
| #define | _PB1 0x2 |
| #define | _PB0 0x1 |
| #define | _DDB7 0x80 |
| #define | _DDB6 0x40 |
| #define | _DDB5 0x20 |
| #define | _DDB4 0x10 |
| #define | _DDB3 0x8 |
| #define | _DDB2 0x4 |
| #define | _DDB1 0x2 |
| #define | _DDB0 0x1 |
| #define | _PINB7 0x80 |
| #define | _PINB6 0x40 |
| #define | _PINB5 0x20 |
| #define | _PINB4 0x10 |
| #define | _PINB3 0x8 |
| #define | _PINB2 0x4 |
| #define | _PINB1 0x2 |
| #define | _PINB0 0x1 |
| #define | _PA7 0x80 |
| #define | _PA6 0x40 |
| #define | _PA5 0x20 |
| #define | _PA4 0x10 |
| #define | _PA3 0x8 |
| #define | _PA2 0x4 |
| #define | _PA1 0x2 |
| #define | _PA0 0x1 |
| #define | _DDA7 0x80 |
| #define | _DDA6 0x40 |
| #define | _DDA5 0x20 |
| #define | _DDA4 0x10 |
| #define | _DDA3 0x8 |
| #define | _DDA2 0x4 |
| #define | _DDA1 0x2 |
| #define | _DDA0 0x1 |
| #define | _PINA7 0x80 |
| #define | _PINA6 0x40 |
| #define | _PINA5 0x20 |
| #define | _PINA4 0x10 |
| #define | _PINA3 0x8 |
| #define | _PINA2 0x4 |
| #define | _PINA1 0x2 |
| #define | _PINA0 0x1 |
Typedefs | |
| typedef Port< _DDRD, _PORTD, _PIND > | AVRCpp::PortD |
| typedef Port< _DDRC, _PORTC, _PINC > | AVRCpp::PortC |
| typedef Port< _DDRB, _PORTB, _PINB > | AVRCpp::PortB |
| typedef Port< _DDRA, _PORTA, _PINA > | AVRCpp::PortA |
1.5.2
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 MTÜ TTÜ Robotiklubi
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